IRC logs for #openrisc Wednesday, 2016-03-16

--- Log opened Wed Mar 16 00:00:36 2016
olofkandrzejr: Yeah, I never pushed the coregen provider stuff to FuseSoC, but I think the other patches are applied04:23
andrzejrolofk, there are a few new commits in my repo but they need reviewing (haven't looked at them for ~4 months). Are there any features providing a function similar to coregen provider?04:57
wallentoandrzejr: cool, thanks!05:00
wallentowill have a look soon05:01
wallentoolofk: which gdbserver?05:01
_franck__juliusb: FYI search doesn't work anymore on you IRC log server05:18
olofkandrzejr: No, I haven't implemented anything equivalent to your coregen provider. It would be interesting to see if it can be solved by doing it with a pre_build_script instead06:00
olofkI still haven't decided if the coregen provider is genious or madness :)06:01
olofkwallento: This one http://opencores.org/or1k/Linux#Status06:02
wallentoah, its inside Linux userland, right?06:04
olofkThat's how I understand it06:47
olofkWanted to deprecate that whole page, but wasn't sure about what to say about gdbserver06:48
shorneolofk: in terms of those opencores pages, I see they are all backed up to https://github.com/openrisc/community-wiki/blob/master/Linux.mw07:08
shorneshould we try to get them all into openrisc.io ?07:09
shornethen put links on opencores.org to openrisc.io ?07:09
shorneis that the plan?07:09
shorneor are there issues with copying that text07:09
wallentoyes, thats the idea07:19
wallentofilter out the currently important information07:19
wallentolists.librecores.org is up now, will need some testing, but we can go live then07:19
olofkI've been fixing up a lot of the documentation on the opencores wiki over the years, but much of the stuff would probably make sense to have as stand-alone pages, like the ones we have for Debugging and Linux now in the tutorials repo07:56
wallentohttps://lists.librecores.org/listinfo/openrisc08:13
wallentothe new mailing list is up08:14
olofkwallento: Great. Let's tweet :)08:14
wallentoI have made julius and you administrators too, but it does not require moderation or any other s**t08:17
rahis this *another* openrisc mailing list? :-)08:18
olofkrah: Yeah, it's a mess. But openrisc.net died because the maintainer ran away, and opencores doesn't seem to care, so that one is down too08:20
rahoh right08:21
olofkWhich is all the more reason to move away the rest of the important stuff from opencores08:22
rahaye08:23
rahI was aware that there were issues with opencores but I didn't realise the openrisc.net maintainer ran away08:24
wallentoyes, and librecores.org is now community controlled08:24
wallentoby FOSSi Foundation08:25
wallentoso, it should be _the_ OpenRISC mailing list and not yet another :)08:25
olofkrah: I tried to get control over openrisc.net when it was about to expire, but lost it to domain squatters :/08:27
rah:-/08:28
rahwallento: aye, I saw FOSSi08:28
rahand #fossi :-)08:28
rahthis is good08:28
olofkNeed to do something about the pulpino boot. The program I run only takes ~100us, but there's a 15ms startup time before I get there08:30
olofkNot sure exactly what it does. It seems to send a reset and some other stuff over jtag08:31
olofkand half of the times, I forget that I need to copy some files manually, so I wait 10 minutes just to get an error message. Doh!08:34
olofkBut I'm damn close now. Probably just some timescale fuckup in the uart printout08:42
olofkHaven't done much systemverilog, but at least it looks like they have added the option to explicitly set the time unit, as in VHDL. That alone would be enough to switch over :)08:46
olofkverilog timescale are horrible horrible horrible08:46
olofkUnfortunately, timescales are heavily used in things like RAM models, and I don't expect them to swtich over anytime soon08:47
shornewallento: thanks for setting up that mailing list, joined. Do you think we would need speparate lists for separate discuttions? like linux, gdb, etc?09:04
shorneor all in one place? I would think just one list is fine for now09:04
wallentoyes, we should stick to one place09:05
wallentonot much traffic09:05
wallentoand openrisc discussions have the tendency to diverge into several topics :)09:05
shorneolofk: for the memset patch I am just doing some testing, in case there are questions about performance, how did you test that its actually faster?09:13
olofkshorne: I fired it up in or1ksim, enabled instruction tracing and noticed that it used 10% less instructions during boot and made 13% fewer memory accesses09:21
olofkNot sure about the exact numbers, but I hopefully wrote it down somewhere09:21
olofkDuring Linux boot that is09:21
shorneok, thats what I thought, you have to look at a kernel load09:22
shorneI was thinking to write some test, but it would be a bit hard to from user space09:22
shorneill trace the boot09:23
olofkshorne: Yeah, I was a bit unsure about the proper procedure to test it. More testing would be most welcome09:23
olofkIt sucks that our searchable documentation database is down :(09:24
olofkjuliusb: Heeeeelp!09:24
olofkshorne: http://www.juliusbaxter.net/openrisc-irc/%23openrisc.2015-02-06.log.html#t12:3109:31
shorneolofk: yeah, I found lost of good stuff in there10:13
shornethank you for the link10:13
olofkhmm.. ok. So the pulpino UART for some reason sends with the wrong baud rate11:35
olofkhmm.. actually.. it's supposed to do that.. hmm11:37
olofkaha. Got it!11:49
olofktimescale calculation was quietly rounded, so a period time of 1280 became 100011:50
olofkI tell you. They are nothing but trouble those damn timescales11:50
andrzejrolofk, I'm OK with pre_build_script instead of coregen provider. I remember you preferred not to call scripts for portability reasons, though. Hence the provider.17:12
andrzejrIMHO provider is fine but it would be better if it could be defined by the user. The same is true for synthesis and simulation tools.17:14
andrzejrOne (minor) issue with the provider is naming of methods and status flags ("fetch", "downloaded"). The API could be renamed or extended if we cared about that.17:20
shorneDoes the mor1kx support write back cache now? I am reading pdf spec and it says write through only, but I see the kernel code supports flushing for write back.  But I cant really see where it happens/is configured in the mor1kx verilog code18:34
-!- Netsplit *.net <-> *.split quits: killertux, rokka22:19
-!- Netsplit over, joins: killertux, rokka22:25
--- Log closed Thu Mar 17 00:00:38 2016

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