I'm a digital design engineer currently living and working in Stockholm, Sweden Cambridge, England San Diego, California Sydney, Australia.
I studied at the University of Queensland (BEng) and KTH, Stockholm (MSc).
Below are a few things I'm involved in.
I've been involved with getting the Free and Open Source Silicon Foundation off the ground in recent years. It's a UK-based C.I.C aiming to foster a mature open source semiconductor design ecosystem, focused mainly on digital design IP and tools.
I'm currently involved as a director of the Foundation and help arrange our yearly conference held in Europe, ORconf. I'm also involved in the licensing committee, read about our activities here.
I worked on the OpenRISC project where I developed CPU implementations and low-level software.
I host most of my current work at http://github.com/juliusbaxter (although, that's all pretty out of date, see the OpenRISC organisation on github for the most up to date stuff).
I also host logs for the #openrisc channel on irc.freenode.net.
I wrote my master's thesis on the project, you can download a PDF copy here.
I'm having a go at putting together a weak copyleft license for open source RTL designs.
A fork of the MPL2, the Open Hardware Description License (OHDL) aims to be more applicable to RTL code than software licenses, and make that code more likely to be used by industry. Find out more about it here.
FOSSi have a good page on open source digital design licensing which I contributed to.
The Free and Open Source Silicon Foundation - FOSSi - the vanguard of the open source digital design movement
LibreCores - OpenCores Done Right™
Veripool.org - great open source Verilog and SystemC tools by the awesome Wilson Snyder
FuseSoC - the next-generation IP and SoC development environment
lowRISC - open source SoC
M-Labs - they actually make things
RISC-V - a worthy contemporary open source ISA
Cocotb - RTL testbenches in Python
PULP - one of the better RISC-V based multicore SoCs out there
SymbiFlow - open source FPGA tools
efabless - properly open source chips.
ORConf 2019, Bordeaux, France - Organiser
Latch-Up 2019, Portland, Oregon - Organiser, presenter
ORConf 2018, Gdansk, Poland - Organiser
ORConf 2017, Hebden Bridge, UK - Organiser
ORConf 2016, Bologna, Italy - Organiser
OSHUG, London - The Open Source Silicon Design Ecosystem, video
ORConf 2015, Geneva, Switzerland - Organiser
EHSM #2, Hamburg, Germany - "The mor1kx OpenRISC processor" - video - EETimes article
Chip Hack May 2014, Cambridge, England - Tutorials on basic FPGA use and the OpenRISC Platform
ORConf 2013, Cambridge, England - Organiser, workshop and "mor1kx progress report"
OHS2013, Boston, USA - "Open Chip Development: What there is to gain, and is it possible?"
Chip Hack April 2013, London, England - Tutorials on basic FPGA use and the OpenRISC Platform
ORConf 2012 - Stockholm, Sweden - Organiser, and "The new mor1kx CPU core"
OSHUG 17, London, England - "Practical System-on-Chip (Program your own open source FPGA SoC)"
FSCONS 2012, Gothenburg, Sweden - "1576800000000000 cycles later (OpenRISC Project update)"
FOSDEM 2012, Brussels, Belgium - "True open hardware: Opencores and OpenRISC"
FSCONS 2011, Gothenburg, Sweden - "About The OpenRISC Project"
FSCONS 2011, Gothenburg, Sweden - "Workshop: The OpenRISC Project"
linux.conf.au 2011, Brisbane, Australia - "The OpenRISC Platform"
Find me in #openrisc on irc.freenode.net