| --- Log opened Fri Aug 26 00:00:42 2016 | ||
| olofk | ZipCPU: It means I deprecated the old way to specify arguments. I didn't want to update the core files, since that would mean that it would stop working for people with older versions of FuseSoC | 03:55 |
|---|---|---|
| olofk | The plan is instead to put out a new version of these cores first with the changes | 03:56 |
| olofk | But the dependency handling has been a weak point in FuseSoC for all its life. I finally bit the bullet earlier this summer and I'm almost ready to push a patch with improved dependency handling | 03:56 |
| olofk | It's taken a looooong time to figure out all the corner cases to have somewhat good backwards compatibility | 03:57 |
| olofk | But it looks like I'm almost there now. Just one known issue left | 03:58 |
| olofk | No documentation of course, but I have waited with this patch for so long, so I just want to get it out now | 03:58 |
| olofk | And once that is done, it will be a lot easier to push out new versions of the cores, and I will be able to phase out some older stuff | 03:59 |
| ZipCPU | olofk: You must have regressed. Now I get the same error as before the mor1kx_bus_if_avalon.v reference was 'fixed'. ;) | 13:21 |
| ZipCPU | Just writing to let you know of a new OpenCores core that could help mor1kx-generic out: the wbuart32 core. | 13:21 |
| ZipCPU | This core packages up my personal txuart.v and rxuart.v transmitter and receiver cores, together with a uartsim.cpp that matches their work from a C++ context. | 13:22 |
| ZipCPU | You should still be able to connect your UART 16550 core to the uartsim.cpp test facility--you'll just need to properly give it the setup register. | 13:22 |
| SMDhome1 | ZipCPU have you tried your uart w/ dhrystone? | 14:06 |
| ZipCPU | Do you mean, have I hooked it up to mor1kx-generic to see if it works? No. | 14:07 |
| ZipCPU | My goal, though, is to hook it up to mor1kx-generic--I just need to get mor1kx-generic to build. | 14:07 |
| ZipCPU | olofk was helping me with that, but it looks like that effort got mired in a myriad of bugs associated with a new release that isn't quite ready. | 14:08 |
| SMDhome1 | ZipCPU so I assume I should not update fusesoc as long as it works for me now?) | 14:25 |
| ZipCPU | Exactly! | 14:25 |
| ZipCPU | SMDhome1: If you are interested in connecting up the UART, I can talk you through it ...? | 15:09 |
| SMDhome1 | Can anyone tell me if watchpoints are implemented in mor1kx now? | 15:09 |
| SMDhome1 | ZipCPU It would be great! I've spent today dealing w/ PCU and tomorrow I want to finish uart business | 15:10 |
| olofk | SMDhome1: I don't think we have watchpoints | 17:04 |
| ZipCPU | olofk: Any idea why Verilator would puke at line 275 in uart16550-1.5.4/rtl/verilog/uart_transmitter.v? | 17:09 |
| ZipCPU | "syntax error, unexpected INTEGER NUMBER, expecting IDENTIFIER or ')'? | 17:09 |
| ZipCPU | It's on a $fflush line within an if (SIM) begin ... end construct. | 17:10 |
| ZipCPU | It would be easy enough to enclose those if (SIM) lines in an `ifndef VERILATOR ... | 17:18 |
| olofk | That should be enough | 17:27 |
| olofk | Are you planning on hooking up your socket machinery in there? | 17:28 |
| ZipCPU | Yes!!!!! | 17:28 |
| olofk | ah ok | 17:28 |
| ZipCPU | Where should I make my temporary changes: .local/share/orpsoc-cores/systems/mor1kx-generic/rtl/verilog? | 17:28 |
| olofk | I thought you would expose the tx/rx lines to another UART | 17:28 |
| ZipCPU | Well, yeah, but ... the change needs to be made in mor1kx-generic/rtl/orpsoc_top.v ... that's where the line needs to be exposed to. | 17:29 |
| ZipCPU | The change also needs to take place in mor1kx-generic/bench/verilator/tb.cpp --- that's where the C++ module needs to connect. | 17:29 |
| olofk | I used to to it like that, but to a lightweight UART that only read the TX line from the real UART | 17:29 |
| olofk | You can make the changes in those files directly | 17:30 |
| olofk | But do you need to also change the UART core? | 17:30 |
| ZipCPU | fusesoc won't overwrite them without a fusesoc update? | 17:30 |
| ZipCPU | No, I don't need to change the UART core at all. | 17:30 |
| olofk | Hmm.. but why did you ask about line 275 a bit earlier? | 17:31 |
| ZipCPU | Do I need to adjust any files so that my two new C++ files get compiled? | 17:31 |
| ZipCPU | Oh, easy ... Verilator was puking and so it wasn't even building. | 17:31 |
| ZipCPU | It's now building, although with a lot of warnings, so I can at least move forward with my changes. | 17:32 |
| olofk | And to answer your other question, fusesoc won't touch those files you want to change in ~/.local/share/orpsoc-cores | 17:32 |
| olofk | aha | 17:32 |
| olofk | cool | 17:32 |
| ZipCPU | So, basically, I need to wire the uart to the external interface of orpsoc_top.v | 17:32 |
| ZipCPU | tb.cpp then grabs these wires, and plugs them into a simulation interface. | 17:32 |
| ZipCPU | The simulator decodes the UART and forwards it ... wherever. | 17:33 |
| ZipCPU | I was thinking stdin/stdout might make more sense than a TCP/IP port, so I made some modifications so that would work. | 17:33 |
| * kc5tja sighs | 17:34 | |
| kc5tja | I just got an e-mail from someone following the Kestrel project, and I feel really quite bad because he was looking to use Oberon, and I've just not had the time or bandwidth to invest in furthering my port. :( | 17:34 |
| ZipCPU | Open source: you get what ... you get. Don't like it? Fix it yourself, right? | 17:34 |
| * kc5tja really must get more organized. But, it's really hard when you're as scatter-focused as I am. | 17:35 | |
| kc5tja | Yes, of course; but it's still a concern to me that I've spent this much time no K3 and still have nothing to show for it. | 17:35 |
| kc5tja | And the 5th Workshop just around the corner too. >:/ | 17:35 |
| kc5tja | Anyway, just kvetching. Feel free to ignore me for now. | 17:36 |
| ZipCPU | Is your job connected to the workshops, or just your hobby? | 17:36 |
| kc5tja | Purely hobby. While I'd love to get a job at Sifive or other RISC-V-related company, it's just a pipe-dream for me at the moment. | 17:36 |
| kc5tja | However, my job is definitely a contributor to my emotional and intellectual drain. | 17:36 |
| ZipCPU | So why don't you take your time and enjoy the ride? Skip a workshop or two ... ? | 17:37 |
| kc5tja | I skip every other workshop. | 17:37 |
| ZipCPU | or two? | 17:37 |
| olofk | ZipCPU: I'd prefer the socket way. It's completely impossible to get a decent stdin with the other simulators :/ | 17:39 |
| ZipCPU | It's just a configuration change. | 17:39 |
| olofk | otoh, we're keeping the current way for the other sims, so it doesn't matter | 17:39 |
| olofk | aha | 17:40 |
| olofk | Nice | 17:40 |
| ZipCPU | I could've done it nicER, but it works. | 17:40 |
| ZipCPU | (I made a copy of the network code, and turned it into file-descriptor code. Might've made more sense to merge the two properly ...) | 17:41 |
| ZipCPU | olofk: If I want to add a required compile file to the mor1kx-generic.core file, it would be under [verilator] ... but what prefix? | 17:43 |
| ZipCPU | Do I add a second item to tb_toplevel = bench/verilator/tb.cpp bench/verilator/mycode.cpp? | 17:43 |
| olofk | Just read the documentation :) | 17:44 |
| * ZipCPU makes some unintelligible sound | 17:44 | |
| olofk | Sorry. Bad joke :) | 17:44 |
| olofk | No, but looking through the code, there is an option called src_files in the verilator section | 17:44 |
| olofk | Actually, you can browse all options available in the core files if you go to the doc directory and run 'make doc' | 17:46 |
| olofk | In fusesoc | 17:46 |
| olofk | They are automatically generated from the code to an asciidoc file | 17:46 |
| olofk | make doc converts them to html | 17:46 |
| olofk | In hindsight I should probably have gone with markdown instead, so I wouldn't have to do the extra conversion step | 17:47 |
| ZipCPU | You mean ... in my /usr/local/lib/python2.7/dist-packages/fusesoc directory? | 17:47 |
| olofk | ah right | 17:48 |
| ZipCPU | There's no Makefile in there. | 17:48 |
| olofk | I'm so used to work from the git tree | 17:48 |
| olofk | I really, really need to do something about the documentation :( | 17:48 |
| ZipCPU | Hmm ... is src_files appropriate for C++ files? | 17:50 |
| olofk | There's another option that tells FuseSoC if the verilator tb is written in c, c++ or systemC | 17:50 |
| olofk | ZipCPU: HTML docs -> https://www.dropbox.com/s/n89nbq1xqms1xn0/fusesoc_docs.tar.gz?dl=0 | 17:52 |
| olofk | Mainly to be used as a reference for which options are available in the .core files | 17:52 |
| mafm | https://www.crowdsupply.com/eoma68/micro-desktop -- about to end and the campaign met the goals in the last few hours | 17:52 |
| olofk | mafm: Awesome! | 17:53 |
| ZipCPU | Hmm ... dropbox didn't work. I've got a text file, not a tar.gz file. | 17:54 |
| ZipCPU | ls | 17:54 |
| * mafm pledged for a couple of cpu-cards plus a few extras (mini-desktop boxes and so on) | 17:54 | |
| ZipCPU | (Sorry, wrong window ...) | 17:54 |
| olofk | ZipCPU: Really? | 17:54 |
| olofk | That's odd | 17:55 |
| ZipCPU | Yup. I think I have a git copy of fusesoc now. I'm looking at html files in the doc directory. | 17:55 |
| ZipCPU | https://www.youtube.com/watch?v=g8vHhgh6oM0 | 17:58 |
| ZipCPU | Well ... okay ... now it's building, but ... I'm not getting any output. Looks like I'm going to have to do some digging. | 18:00 |
| olofk | Is the verilator tb building? | 18:02 |
| ZipCPU | Yep. It's building now. It even runs. I just don't get any of the output I'm expecting. | 18:03 |
| olofk | aha | 18:03 |
| ZipCPU | So, this one's on me, I've got to do some digging to figure this one out. | 18:03 |
| -!- _florent__ is now known as _florent_ | 19:40 | |
| --- Log closed Sat Aug 27 00:00:32 2016 | ||
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