| --- Log opened Sat May 21 00:00:16 2016 | ||
| zump | Whats a good HW device to start designing stuff using AXI bus? | 01:38 |
|---|---|---|
| olofk | shorne: For the stack hack I think we can let it be for now. I guess the worst thing that could happen is that some struct comes out wrong in gdb | 03:53 |
| olofk | For the first issue, I would like some input from stekern or blueCmd or someone else who has been doing more of the spec work | 03:55 |
| blueCmd | olofk: read the gcc code :P | 04:36 |
| blueCmd | stupid varags handling. remember it being a pain when porting glibc | 04:36 |
| blueCmd | don't remember the details tho, sorry | 04:36 |
| shorne | blueCmd: this is about return conventions, i.e. struct is returned as pointer passed to in r3 | 04:59 |
| shorne | I think I found in GCC here | 04:59 |
| shorne | https://github.com/openrisc/or1k-gcc/blob/or1k/gcc/config/or1k/or1k.h#L541 | 05:02 |
| shorne | LIBCALL_VALUEE, but not sure if its the whole picture, it doesnt match so well what is in gdb, Ill keep looking but if you know where a pointer would be helpful | 05:03 |
| shorne | olofk: I have one more small patch on top of the last which is a bit more safe handling of the 'stack hack' | 05:04 |
| blueCmd | shorne: https://github.com/openrisc/or1k-gcc/blob/or1k/gcc/config/or1k/or1k.h#L638 | 05:05 |
| shorne | blueCmd: thanks | 05:08 |
| shorne | olofk: need to update some comments then Ill post another patch. Theory of the fix is if we have fabricated args that we to copy to target and get a pointer to then we cant put on the bottom stack since we may need to put args there. So instead, we create some space at the top and put the data there (like a tiny heap). | 05:12 |
| shorne | sounds complicated, but code fix is pretty minimal | 05:12 |
| shorne | and it should be more safe then whats there now | 05:13 |
| ZipCPU | zump: Isn't the AXI bus a Xilinx proprietary creation? Good hardware, then, would be something from Xilinx. | 06:21 |
| wallento | AXI is Amba is ARM | 06:39 |
| ZipCPU | wallento: I stand corrected. | 06:45 |
| ZipCPU | I just know I keep stumbling across these proprietary Xilinx IP blocks when wandering through the generate IP section of Vivado. | 06:46 |
| wallento | zump, I by the way would suggest starting with a zedbaord | 06:46 |
| wallento | or something like this | 06:46 |
| wallento | my wild guess is you have an ARM core, so designing your hardware block in a zynq platform comes pretty near | 06:47 |
| --- Log closed Sun May 22 00:00:17 2016 | ||
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