| --- Log opened Fri Sep 04 00:00:29 2015 | ||
| andrzejr | pushed a Wishbone to UI bus adapter. Should work with all WB transaction types (tested with olofk's bfm transactor), byte and half-word access may work but wasn't tested. | 00:28 |
|---|---|---|
| andrzejr | The interface doesn't do caching or read prefetching. The rationale is that for high performance we need a better bus (like CAMD) between CPU's cache and SDRAM controller anyway, and the adapter can be then repurposed as a WB->CAMD bridge. | 00:30 |
| andrzejr | question: what sw tool chain should I use to compile a bare minimum C program? Something to initialize the CPU (cache, stack, irqs) and run a simple loop to blink an LED. | 00:41 |
| andrzejr | I guess that would be newlib but does anyone have a working example of such program? | 00:42 |
| jeffesquivels | hi! | 05:40 |
| jeffesquivels | the link to the Ubuntu VM image referenced on this page seems to be dead: http://opencores.org/or1k/Ubuntu_VirtualBox-image_updates_and_information | 05:40 |
| jeffesquivels | I'm guessing that's permanent (given the version of Ubuntu it's based on, which is 4 years old) | 05:40 |
| jeffesquivels | ? | 05:40 |
| juliusb | jeffesquivels: yes that is quite old | 06:47 |
| juliusb | there were some VM images done up for chiphack if I recall... | 06:47 |
| juliusb | This one might be better... | 06:51 |
| juliusb | https://drive.google.com/file/d/0B8QBx9Nr1WjyZUNPZFZOWXBFWjg/view?usp=sharing | 06:51 |
| juliusb | 6GB, used for chip hack last year in Cambridge, instructions here: https://github.com/embecosm/chiphack/wiki | 06:52 |
| olofk | andrzejr: Cool. That will be very handy for hooking up Xilinx mem controllers | 06:56 |
| olofk | Unfortunately I have the impression that they change their UI interface slightly between revisions. Hopefully it won't cause too much headache | 06:57 |
| olofk | And I should add halfword/byte accesses to wb_bfm. There have been bugs in that area in other controllers | 06:58 |
| olofk | andrzejr: And are you just looking for a compiled program? There are precompiled toolchains available that you could download and try yourself | 06:58 |
| andrzejr | olofk, yes, changes in Coregen/MIG are a concern. There is a mechanism for forcing a Coregen version but it was breaking the build last time I tried it. For this board I can always provide the auto-generated source code on request. | 07:36 |
| andrzejr | as for the toolchain, I will try the VM image mentioned by juliusb. Had some problems building the toolchain myself, so it is useful to have a reference setup. | 07:40 |
| andrzejr | Also, I'm looking for a simple bootloader and an application program for or1k (e.g. a blinker) to test the toolchain and bootloader. I don't want to jump straight into linux. | 07:42 |
| olofk | andrzejr: I have created a small library of bootloaders for such usecases (simple LED blinker, boot from SPI Flash, clear r3 and jump to 0x100... etc) | 08:03 |
| olofk | It's in the or1k_bootloaders component | 08:03 |
| olofk | You can see an example of how it's used in the de0_nano port | 08:03 |
| olofk | Just add a a dependency on or1k_bootloaders-0.9, instantiate and hook up wb_bootrom and set the parameter MEMFILE="../src/or1k_bootloaders/led_blink.vh" | 08:05 |
| olofk | or1k_bootloaders-0.9 | 08:06 |
| andrzejr | olofk, thanks. I've seen it - I used it as a base for my own assembly code for early tests. | 08:06 |
| olofk | cool | 08:06 |
| latif | hi all..For 3 weeks, I am trying to boot Linux kernel on Atlys board by using u-boot bootloader and last version of linux kernel on the offical web-site github/openrisc/linux. I think I am doing everything correctly but there becomes a really interesting error or how you call.. The kernel image uImage is transfered successfully to the board by u-boot. (tftp uImage) | 08:07 |
| latif | Then I am writing the execution command "bootm 100000". It starts running and says like; "veryfing checksum ....ok "loading kernel image...ok "ok" | 08:07 |
| andrzejr | Now I want to try a gcc-based flow so it would be useful to see some existing code using newlib or a similar library. | 08:08 |
| latif | After the last "ok" it stops running!!! And doing nothing!!! I am waiting but absolutely nothing is changing.!! I made so many trying and different variation of kernel image but I got absolutely the same result everytime!! Please suggest me your ideas or solutions!! | 08:08 |
| olofk | andrzejr: If you have a UART, you could just try a simple hello world | 08:08 |
| olofk | With the newlib toolchain | 08:08 |
| olofk | http://openrisc.io/newlib/ | 08:09 |
| andrzejr | I noticed wb_rom.v is quite a bit simpler than Atlys's rom.v (doesn't support bursts so it won't work after enabling caches) | 08:11 |
| olofk | latif: Perhaps you could try some other application other than Linux | 08:12 |
| olofk | andrzejr: Hmm... that's not right. A burst-capable master is supposed to be able to talk to a non-burst-capable slave | 08:12 |
| latif | Olofk: I have tryied many application by using u-boot. They are runnig perfectly | 08:13 |
| olofk | latif: Sorry. Then I'm out of ideas | 08:13 |
| latif | olofk: ok. thanks | 08:13 |
| andrzejr | olofk, thanks for the link to newlib - somehow I have missed it | 08:14 |
| andrzejr | gtg | 08:14 |
| latif | olofk: by the way.. I have noticed a strange problem in orpsoc-v3.. ıf you send 2 instruction to the wb_bus serially, it does not work correctly.. I mean it does not execute second inst. But If you add a l.nop inst between the two it runs normally | 08:16 |
| latif | I noticed this problem while I was working on the spi- boot problem. the simulation result and the test on board says the same. When I add the l.nop instruction between the two instructions the bootrom code is running both in simulation and on board.! | 08:19 |
| olofk | latif: Hmm... do you have any waveforms I can look at? That sounds strange | 08:23 |
| latif | Olofk: let me find.. | 08:23 |
| latif | olofk: I will send a few file.. Can I send them to your gmail address?? | 08:32 |
| olofk | Yeah, you can do that, but I'm not sure how large files gmail can handle | 08:33 |
| latif | I will do it anyway. | 08:34 |
| olofk | Just send them to [email protected] and I'll take a look when I have time | 08:41 |
| _franck__ | latif: you should download and start linux from openocd, then when it doesn't boot, halt the processor and check the pc address | 12:03 |
| poke53281 | stekern: http://grumpygamer.com/monkey25 | 12:07 |
| poke53281 | the good old times | 12:10 |
| latif | franck: I will try using OpenOCD but I need to boot linux from spi flash | 12:56 |
| _franck__ | latif: why ? | 13:33 |
| _franck__ | when it works from ram you'll try to boot it from spi flash | 13:36 |
| latif | franck: yeah. I got. I just mean I need boot it from spi at the end. I am trying to use OpenOcd now. by the way the kernel that I use is runnig on simulator perfectly... | 13:41 |
| _franck__ | latif: ah crap, I don't think xilinx bscan is well supported in openocd. I know some made it works but I don't think it is straightforward | 14:01 |
| latif | franck: Ahh.. really!! So you mean I cant use openocd with atlys, rigth?? What if I use a de0_nano board?? I dont have it but I can buy it in a few weeks. But possibly, linux will already boot on it properly. Even if it is done, It s not gonna solve my problem, because I want to boot it from an spi flash and de0_nano hasnt got one. So I think I have to find another way! | 14:45 |
| jeffesquivels | juliusb: thank you very much! | 14:53 |
| jeffesquivels | right now I'm trying to figure everything out (too much information, some of it outdated and spreaded on several places, he he) | 14:54 |
| jeffesquivels | so, are most of you guys on Europe or it's just that you like to work until very late? :-) | 15:40 |
| -!- Dan_ is now known as Guest64350 | 15:42 | |
| jeffesquivels | brb | 15:47 |
| jeffesquivels | (which reminds me I need to set up an IRC proxy, it's being a while since I used IRC frequently) | 15:48 |
| andrzejr | _franck_, AFAIK it's not bscan JTAG tap. The problem is in the proprietary Digilent JTAG cable. Digilent provides some closed source libraries for talking to the cable but so far no one has used them in OpenOCD or urjtag. Besides, that would be difficult to distribute. | 19:42 |
| andrzejr | Atlys instantiates an extra JTAG tap connected to an JTAG port on the board (not the one used for programming FPGA). This apparently works but requires an external JTAG cable. | 19:45 |
| andrzejr | Some people reported that Olimex ARM-USB-OCD-H works fine. | 19:46 |
| andrzejr | The same limitation applies to Nexys boards, btw. | 19:46 |
| stekern | poke53281: nice grumpygamer blog post ;) | 19:47 |
| --- Log closed Sat Sep 05 00:00:30 2015 | ||
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