| --- Log opened Sat Jun 14 00:00:33 2014 | ||
| stekern | wow, this is actually pretty stable now | 05:10 |
|---|---|---|
| _franck_ | my kernel crash because of WISHBONE_BUS_BIG_ENDIAN + ethoc | 06:24 |
| _franck_ | cool you found a bug in wb_port.v ! I also have this in wb_altera_ddr_wrapper | 06:25 |
| stekern | hmmm... shouldn't that change actually make it *not* crash? | 06:29 |
| _franck_ | I would say yes, I'll check this later | 06:30 |
| stekern | https://github.com/skristiansson/wb_sdram_ctrl/commit/07eb97fc4afa5ca7bd6c17e88a5bb02474480808 | 06:30 |
| stekern | that's the change I did to wb_sdram_ctrl | 06:30 |
| olofk | stekern: Interesting. Can you easily reproduce it so I can improve the tb? | 06:58 |
| stekern | yes, it should be quite easy to reproduce in simulations | 07:20 |
| stekern | read address, write address+4, read address | 07:21 |
| stekern | on same port, without de-asserting stb&cyc between accesses | 07:21 |
| stekern | nice, I've changed the multi-core soc to use wb_intercon now | 07:31 |
| olofk | Are you allowed to change we during a burst like that? | 08:50 |
| stekern | it's not during a burst | 10:00 |
| stekern | classic cycles | 10:00 |
| olofk | ahh.. I haven't implemented classic cycles yet | 10:29 |
| stekern | didn't I add support for th? | 10:42 |
| stekern | them | 10:42 |
| stekern | a classic cycle is exactly the same as a burst end cycle | 10:42 |
| olofk | wb_bfm has implemented them, but the wb_bfm_transactor only generate accesses with cti != 000 | 11:31 |
| stekern | how about 111? | 11:44 |
| olofk | All transactions end with an 111 cycle | 12:16 |
| olofk | But you're saying there is no difference between 000 and 111 on single accesses? | 12:17 |
| stekern | yes, that's right | 12:23 |
| rfajardo | hi hi, I’m trying fusesoc right now and I am currently failing to simulate wb_sdram_ctrl as described in the readme instructions. | 14:59 |
| rfajardo | First, the simulator seems to miss a timescale.v. After creating it and including it into the wb_sdram_ctrl.core, it outputs “fusesoc.elf: Unable to open input file.” | 15:00 |
| stekern | rfajardo: hmm, works here | 16:38 |
| stekern | osx specific problwm by any chance? ;) | 16:38 |
| rfajardo | no comments : | 16:39 |
| rfajardo | btw, linux is running on the architecture simulator everything on OSX | 16:40 |
| rfajardo | gonna try under Linux | 16:40 |
| stekern | yeah, it's good that someone use the stuff under osx | 16:43 |
| rfajardo | still the same problem under Linux | 16:47 |
| rfajardo | http://pastebin.com/Y5XAhQtN | 16:48 |
| rfajardo | brb | 17:08 |
| stekern | ok, my orpsoc-cores wasn't up-to-date | 17:15 |
| stekern | I get the fusesoc.elf error too | 17:16 |
| rfajardo | I don’t know enough about the fusesoc internals to pinpoint the error. | 17:19 |
| rfajardo | I’m actually experimenting a little bit with it. | 17:20 |
| rfajardo | and opencores seems to be having some server problems | 17:21 |
| rfajardo | I can’t checkout the or1200 code… | 17:22 |
| rfajardo | svn: E175002: REPORT of '/ocsvn/openrisc/!svn/vcc/default': Compressed response was truncated (http://opencores.org) | 17:22 |
| rfajardo | I guess I’m going to watch football | 17:23 |
| rfajardo | :) | 17:23 |
| _franck_ | rfajardo: did you try --force ? | 17:38 |
| rfajardo | for which of the commands? | 17:39 |
| _franck_ | fusesoc sim blabla --vcd --force | 17:41 |
| rfajardo | it does not help unfortunatelly | 17:45 |
| -!- _franck__ is now known as _franck_ | 18:07 | |
| -!- FreezingAlt is now known as FreezingCold | 23:59 | |
| --- Log closed Sun Jun 15 00:00:34 2014 | ||
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