--- Log opened Tue Sep 17 00:00:59 2013 | ||
stekern | nice, I can read/write the FPGA DDR3 from the arm side now as well | 03:09 |
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hansfbaier | stekern: Did you get the Parallela? | 03:21 |
stekern | hansfbaier: no, haven't got that yet | 04:44 |
stekern | this is the arrow/terasic sockit board I'm playing with | 04:45 |
stekern | http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=816 | 04:45 |
hansfbaier | wow that's a really good price for a FPGA like that. Is Quartus still free for that one? | 04:52 |
hansfbaier | Competitor to the Zynq as it looks | 04:53 |
hansfbaier | Oh it's out of stock. No wonder | 04:55 |
stekern | yes, you can use the quartus web edition with it | 04:58 |
hansfbaier | I almost regret ordering the parallela. but its $100 cheaper and has the epiphany. Smaller FPGA though. | 05:24 |
stekern | for me, the sockit was $100 cheaper than parallela | 05:33 |
hansfbaier | stekern: academic? | 05:34 |
hansfbaier | (sob sob) | 05:34 |
hansfbaier | I guess I should resume college | 05:35 |
stekern | looks like arrow have them in stock, 50$ cheaper too: http://parts.arrow.com/item/search/#st=sockit | 05:36 |
stekern | hansfbaier: no, I'm 10 years out of any academic work =) | 05:36 |
stekern | arrow organized a workshop for $99, and the kit was given away at the workshop | 05:37 |
hansfbaier | stekern: Wow great deal | 05:37 |
hansfbaier | stekern: I'd like to attend workshops like that too ;) | 05:38 |
stekern | it was olofk that hinted me about it | 05:38 |
hansfbaier | But I might waste multiples on airplane tickets... | 05:38 |
hansfbaier | stekern: How would it be possible to interface the ARM <-> OpenRisc on the Parallela/SocKit? | 05:39 |
hansfbaier | stekern: some kine of wishbone/AHB-Bridge? | 05:40 |
hansfbaier | stekern: do you know of something like that? | 05:40 |
stekern | yeah, I think they *did* do the workshops in asia, but the board freebie did not apply there | 05:40 |
hansfbaier | Asians are too greedy | 05:40 |
hansfbaier | http://opencores.org/project,wisbone_2_ahb | 05:43 |
hansfbaier | http://opencores.org/project,ahb2wishbone | 05:44 |
stekern | (interface) on the sockit, you can expose an AXI slave to the FPGA to access the ARM soc and an AXI master to access the FPGA from the ARM | 05:44 |
stekern | qsys can automatically bridge the AXI bus to Avalon, which is easier to bridge to wishbone | 05:45 |
hansfbaier | stekern: Ah great. Yes avalon is almost wishbone except for a couple of gates. | 05:46 |
stekern | The ARM DDR3 SDRAM is also exposed as an avalon bus to the FPGA | 05:46 |
hansfbaier | stekern: nice playground for OpenRISC | 05:47 |
hansfbaier | stekern: The board is awesome value for money $250 for a 110k-FPGA is really good | 05:47 |
stekern | so, what I have currently working is: accessing the ARM DDR3 from orpsoc (i.e. openrisc) and accessing the FPGA DDR3 from the ARM | 05:47 |
stekern | to clarify, there are two 1GB SDRAMs on the board, one for the ARM side and one for the FPGA side to use | 05:48 |
stekern | next step is to do exactly what you asked about, hook up the ARM to the orpsoc wishbone bus | 05:49 |
hansfbaier | stekern: What would be a good way to make the ARM and the OpenRISC work together? | 05:52 |
hansfbaier | stekern: some kind of FIFO on the Wishbone Bus? | 05:53 |
hansfbaier | stekern: or shared mem, but that would need some kind of synch maybe a hardware semaphore or so | 05:53 |
stekern | yeah, I think shared mem probably makes most sense | 05:53 |
hansfbaier | Or run two instances on linux on ARM and OpenRISC | 05:54 |
stekern | but I guess it depends on what you want to do | 05:54 |
hansfbaier | and implement a network driver that uses wishbone | 05:54 |
hansfbaier | that would be fun too | 05:55 |
stekern | hmm, how do you mean? "network driver that uses wishbone" | 05:55 |
stekern | right now, I'm mostly looking at the arm machine as a "tightly coupled dev machine" though =) | 05:56 |
stekern | but regarding networking, I'm planning on hooking up the ARMs second MAC to a MAC on the FPGA side | 05:59 |
hansfbaier | stekern: shared mem | 06:04 |
hansfbaier | as network driver? | 06:04 |
hansfbaier | would that make sense? | 06:05 |
hansfbaier | just hand over the tx/rx buffers to the other machine | 06:05 |
-!- Netsplit *.net <-> *.split quits: simoncook | 06:09 | |
--- Log closed Tue Sep 17 06:21:40 2013 | ||
--- Log opened Tue Sep 17 06:21:53 2013 | ||
-!- Irssi: #openrisc: Total of 26 nicks [0 ops, 0 halfops, 0 voices, 26 normal] | 06:21 | |
-!- Irssi: Join to #openrisc was synced in 24 secs | 06:22 | |
stekern | hansfbaier: ah, you mean like that | 06:36 |
stekern | yes, that'd be pretty cool, and more lightweight than using a mac to interface another mac on-chip | 06:37 |
stekern | but, I'm lazy, so I chose to do that to utilize already existing drivers ;) | 06:37 |
hansfbaier | stekern: this might be a good starting point: | 07:10 |
hansfbaier | http://www.xml.com/ldd/chapter/book/ch14.html | 07:10 |
hansfbaier | stekern: I'll try to cancel my parallela order and if it succeeds, I'll get the sockit. | 07:10 |
stekern | why not get both ;) | 07:13 |
stekern | I have an order on a parallella too | 07:16 |
hansfbaier | stekern: Two reasons: 1. Having a lot of hardware lying around with no time playing with it bothers me | 07:44 |
hansfbaier | 2. the money | 07:44 |
hansfbaier | (I have another pet project: An automated hydroponics nutritioning and watering system, ideally on solar power. That eats up considerable time and money too) | 07:46 |
hansfbaier | but will be a lot of fun | 07:46 |
hansfbaier | finally growing my own vegetables but without the work of irrigation etc. | 07:46 |
hansfbaier | Just set the uC and go | 07:47 |
hansfbaier | There is no food like fresh harvested food. | 07:47 |
hansfbaier | That is a class of its own. No comparison with supermarket / organic etc. | 07:47 |
olofk | stekern: I won't accept that pull request. orpsoc-cores is a drug free repo, so don't even think about pushing a diila | 08:01 |
olofk | whoops... did I remove the branch option from GithubProvider? Shouldn't matter though. A branch can be specified with the version tag as well | 08:02 |
olofk | The only problem will occur when someone gives the same name to a branch and a tag. Haven't got a clue what will happen then | 08:03 |
stekern | olofk: that's bad git practice anyway ;) | 08:23 |
olofk | stekern: Good to know. I was worried that it was the common way to do it | 08:24 |
stekern | shouldn't it be the diila that does da pushing? | 08:27 |
stekern | olofk: food for thought, would it be a bad idea to specify the "offset" in the master definition for each slave instead of under the slave definition in the .conf file for wb_intercon_gen? | 08:32 |
stekern | to illustrate, something like this: http://pastie.org/8332385 | 08:34 |
stekern | the reason I ask is that I've got a 2MB address space on a bus coming from the arm now, and I'd like to map those efficiently onto "all" the peripherals on the wishbone bus (currently it's only uart and gpio, but there will be more) | 08:40 |
stekern | right now I just split up the 21-bit address to the 8-bit MSB of the wb address (to select peripheral) and use the rest to access registers withing peripherals | 08:41 |
stekern | that works, until I nead to access more than 4096 bytes within a peripheral | 08:42 |
olofk | Hmm.. I'm not sure I follow that. Will that mean that the address map will appear differently to the different masters? | 08:52 |
stekern | exactly | 08:53 |
olofk | Hmmm... | 08:54 |
olofk | Pro: It can be done and would make wb_intercon more flexible | 08:54 |
olofk | Con: It could be a bit messy to have different address depending on where you come from | 08:55 |
stekern | agree and agree | 08:56 |
olofk | If this is an uncommon practice, I think I would prefer to have an external address shuffling block on the master that needs it | 08:56 |
stekern | mmm, that's an alternative | 08:57 |
stekern | I might lean towards that too | 08:57 |
olofk | That gives you the freedom to do all crazy kind of things in there :) | 08:57 |
olofk | And wb_intercon won't have a clue that someone is lying to it | 08:58 |
stekern | well, essentially, that's what I already do, but you can of course do it more "cleverly" than just split up the address | 08:58 |
olofk | Do you need 8 bit MSB to select peripheral? | 08:59 |
stekern | poor wb_intercon, if it just knew all the lies I'm telling it ;) | 08:59 |
olofk | :) | 08:59 |
stekern | naah, but that's the easiest | 08:59 |
olofk | It might be common enough for a wb_remap block or something like that | 09:00 |
stekern | that's the orpsocv2 way of doing it | 09:00 |
olofk | Could help with the interrupt vectors too, right? | 09:00 |
stekern | true, if it's made generic enough | 09:01 |
olofk | Might need a few more use cases to see if it's worth making a generic one | 09:01 |
stekern | yeah, it's a bit of a "special" case this assymetrical dual core setup | 09:02 |
stekern | but it's a whole lot more fun building socs with orpsocv3 than orpsocv2 at least | 09:04 |
stekern | adding slaves and masters to the bus was such a pain in orpsocv2... | 09:05 |
olofk | Yeah, on the few occasions I needed an extra slave I usually just replaced an existing one :) | 09:16 |
jeremybennett | Just checked ORCONF and see we are up to 20 participants now. Some well known names there, but a lot of new participants, so it will be a good opportunity to attract some new people to the project. | 13:11 |
jeremybennett | (still time to register: http://orconf2013.eventbrite.co.uk/) | 13:11 |
hansfbaier | stekern: Just ordered my SocKit. Adapteva kindly canceled my order. Thanks for the tip! | 13:50 |
poke53282 | https://news.ycombinator.com/ | 15:28 |
poke53282 | A news about jor1k | 15:28 |
poke53282 | Finally made it on the first page | 15:28 |
jeremybennett | Just heard that Jon Woodruff has agreed to talk about the CHERI processor (open source MIPS clone) at ORCONF. | 15:47 |
stekern | poke53282: Congrats! and seems to be positive feedback there too, you've certainly earned that | 19:53 |
poke53282 | "Technical merits and uses aside, I'm still floored that this kind of thing is even possible. | 21:03 |
poke53282 | I've loaded it up and there's Monkey Island running on ScummVM running in a Linux VM running in Chrome's Javascript VM. Stunning." <- mjfisher | 21:03 |
poke53282 | I should put a direct link to opencores website. You all earned it too. I did only the last step. | 21:09 |
poke53282 | "Fantastic. I love that it's OpenRISC based rather than the "obvious" choice of yet another x86 emulator. And framebuffer support, though slow." <- vidarh | 21:18 |
stekern | ah, well, there been many before us current active openriscers, so every "last step" is an important step I'd say | 21:19 |
poke53282 | is there a way to see the stats of my github site? | 21:26 |
poke53282 | gh-pages site I mean | 21:27 |
poke53282 | Seems not | 21:30 |
poke53282 | I guess that the the whole download volume will exceed 100GB for the github page today. I am glad that I didn't put it on my website. | 22:38 |
--- Log closed Wed Sep 18 00:00:01 2013 |
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