IRC logs for #openrisc Thursday, 2012-11-01

@stekernLoneTech, jeremybennett: ;)05:31
@stekernI think it's in openocd, it works with debug_proxy (I'm not sure about adv_debug_sys proxy)05:33
@stekernMaybe I should start using debuggers for something more than loading programs...05:34
ConXhello guys! can you please check this: https://gist.github.com/ff11cec911f772cee441 Any ideas why this is happening?12:13
@stekernConX: the immediate can only hold 11 bits, so you are actually writing/reading spr 112:33
@stekernsorry, it's 11 bits in mtspr, in mfspr it's 16 bits12:38
@stekernso you are writing spr 0x1 and reading spr 0x280112:38
ConX:D12:41
ConXthank you once more stekern!12:41
ConXso I must use a register to solve it12:42
@stekernyup12:42
ConXthe rA register represents the upper 5 bits ?12:59
ConXso I have to set rA to 3 to be able to write on spr 0x2801?13:00
ConXset rA to 5 (101)*13:02
@juliusbimmidiates in both mtspr and mfspr are 16-bits13:09
@stekernyou are right...13:09
@stekernI missed the 5 bits in 25:2113:10
@stekernthen I don't know what's the problem13:11
@stekernis the MAC enabled?13:14
@stekernis it actually possible to write MACLO manually?13:15
ConXI just wanted to use a spr register to store a counter13:16
ConXI have tried to write and read from 0x6000 (which is the first reserved for future use spr)13:17
ConXwith no success13:17
ConXso I thought I should try MAC (which I don't use)13:17
@stekernbut is it enabled?13:19
ConXnope :)13:20
ConX\//`define OR1200_MAC_IMPLEMENTED13:20
ConXs/\//13:20
@stekernthat seems like a reson why it's not working ;)13:21
ConX:P13:21
ConXI thought that SPRs are implemented this way or the other13:22
ConXsomething (outside my code) must change the value I set in MACLO14:22
ConXwhich tool are you using to visualize or1200?14:36
@stekernvisualize?16:18
ConXstekern: view a circuit schematic16:27
_franck_I think I can see the "stepi bug" on simu23:53
_franck_the ins replaced by the trap ins is never executed when stepi after that breakpoint23:55

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